Currently, defects in fabricated devices (e.g. wafers) can be detected by comparing a target component of a fabricated device to reference components of the fabricated device. Inspection systems accomplish this by taking images of the target and reference components for comparison purposes. In particular, detecting the defects often involves performing two separate comparisons to generate two separate results, one comparison being between the target component and one of the reference components and another comparison being between the target component and the other one of the reference components. Any similarity between the two separate comparison results is generally used as an indicator of a defect in the target component. This is known as a two-pass approach or double detection.
Prior art FIG. 1 shows a traditional layout for a wafer having a plurality of target components in a column 102, each being a same pattern modulated (i.e. amplified) by a different (e.g. incremental) combination of parameter (e.g. focus (F) and exposure (E)) values, and further having a plurality of reference components in columns 104, 106 situated on either side of the column of target components and each being a nominal (i.e. not modulated) version of the same pattern. Thus, for any particular one of the target components in column 102, a corresponding reference component from column 104 and a corresponding reference component from column 106 may be used for detecting defects in the particular target component (see box 108). While the reference components are shown as being adjacent to the target component, this is not necessarily always the case. For example, in other wafer configurations the reference components for any particular target component may be those closest, but not necessarily adjacent, to the particular target component.
Recently, multi-patterning lithography has been introduced to enhance feature density of fabricated devices, which allows for smaller sized components having equivalent or even increased patterning to traditional components. FIG. 2 shows an example of a multi-patterned component of a fabricated device, and particularly a structure printed with triple patterning. As shown, a single layer is patterned with three masks (A, B, and C) having separation (Regions 1 and 2) therebetween. However, use of multi-patterning lithography has introduced a new potential type of defect, namely overlay defects resulting from positioning errors between the different masks. While some defect detection processes have been modified to account for overlay (e.g. U.S. Patent Publication No. 2014/0037187, filed Mar. 2, 2013 to Marcuccilli et al.), these existing defect detection processes still exhibit various limitations.
In particular, as noted above, existing defect detection processes have simply been modified to account for overlay. Thus, the methods used by these defect detection processes, such as that described with respect to FIG. 1, have not been improved but have merely been applied to a new parameter (overlay). Unfortunately, however, these methods exhibit various limitations. One exemplary limitation of existing defect detection processes is that they are not design-aware. In other words, these processes do not take into account the design of the components when performing the defect detection, but instead simply identify defects or errors in the design as a result of defects detected on the fabricated device.
There is thus a need for addressing these and/or other issues associated with the prior art techniques used for defect detection in fabricated devices.